IEEE Transactions on Circuits and Systems for Video Technology · 1999 · 13 citations · 5 references
EngineeringComputer EngineeringElectrical EngineeringComputer ArchitectureEmbedded SystemsSystem-on-chip DesignDigital Image ProcessingDigital Signal ProcessingField-programmable Gate Array ArchitectureImage ProcessingMixed-signal Integrated Circuit DesignTiming AnalysisAsynchronous Circuit DesignAsynchronous Digital Circuit DesignDelay-insensitive CircuitsDigital Signal Processing Block ArchitectureReal-time Hardware ArchitectureTiming
This paper describes an asynchronous one-dimensional order-8 integer cosine transform chip, which can calculate either the forward or inverse transforms. The chip's performance is maximized with a fast computation algorithm and the self-timed circuit technique. The basic self-timed block is a microcoded programmable processor. Eight of these processors are used and achieve a data rate of up to 50 MHz in 0.7-/spl mu/m CMOS technology. If the delay in the handshake circuit can be minimized, the design suggests that asynchronous techniques are a feasible alternative to synchronous designs.
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Ivan E. Sutherland · Communications of the ACM · 1989 · 1K citations · Full text
Asynchronous design methodologies: an overview
Scott Hauck · Proceedings of the IEEE · 1995 · 545 citations
Engineering, Computer Engineering, Electrical Engineering +12
Self-timed system design technique
Yutian Tan, Yaw Chyn Lim · Electronics Letters · 1990 · 13 citations