2005 · 32 citations · 5 references
EngineeringComputer EngineeringElectrical EngineeringLow-power DesignMicroelectronicsVlsi DesignClock ManagementCmos Circuit DesignDigital Integrated Circuit DesignLow-power Digital Circuit DesignMixed-signal Integrated Circuit DesignRadio-frequency Integrated CircuitsClock Generation CircuitsDynamic Power DissipationFrequency ModulationSpread Spectrum Clocking
In this paper, we proposed a spread spectrum clock generator (SSCG) for the Serial AT Attachment Generation 2 (SATA-II). We use a fractional-N PLL to accomplish the spread spectrum function. The SSCG integrates a conventional PLL, a digital 3/sup rd/ order MASH 1-1-1 delta-sigma modulator and an address generator. The SSCG generates clocks at 1.5 GHz, a 5000 ppm down spread with a triangular waveform frequency modulation of 33 kHz. The circuit has been simulated in 0.18 /spl mu/m CMOS technology. The non spread spectrum clocking has a jitter of 80 ps and the peak amplitude reduction is 23.44 dBm in spread spectrum mode. The power dissipation from a 1.8 V supply is 55 mW.
5
High-speed CMOS circuit technique
Jiren Yuan, C. Svensson · IEEE Journal of Solid-State Circuits · 1989 · 792 citations
Engineering, Computer Engineering, Electrical Engineering +16
A fully integrated CMOS frequency synthesizer for Bluetooth
D. Theil, C. Durdodt, A. Hanke et al. · 2002 · 30 citations