Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 2008 · 81 citations · 11 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsLow-power DesignMicroelectronicsAnalog Integrated CircuitsCmos Circuit DesignDynamic Power ReductionLow-power Digital Circuit DesignMixed-signal Integrated Circuit DesignMixed-signal IntegrationCapacitorsCmos Analog Circuit DesignCmos Analog Integrated CircuitsCmos Digital Circuit DesignFrequency SamplingHigh-speed Cmos DesignLow-latency DesignPower Consumption
ADCs with 6b resolution and gigahertz sampling frequency are widely used in serial links, magnetic recording systems and UWB receivers. Flash ADCs have been dominantly used for these applications. This paper presents an ADC that takes advantage of the high-speed digital logic and highly matched small capacitors in deep-submicron digital CMOS processes to achieve similar performance, but with lower power consumption than flash ADCs. Unlike many previously published low-power high-speed ADCs based on time-interleaved SAR, this ADC has only 2 clock-cycle latency (1.6ns at 1.25GS/s) and achieves 6b performance without any digital post-processing or off-line calibration, making it a plug- in replacement for conventional flash ADCs in many applications.
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Scaling, power, and the future of CMOS
Mark Horowitz, E. Alon, Dinesh Patil et al. · 2006 · 282 citations
Engineering, Computer Engineering, Electrical Engineering +17