A 2.5kV isolation 35kV/us CMR 250Mbps 0.13mA/Mbps digital isolator in standard CMOS with an on-chip small transformer

Shunichi Kaeriyama, Shin‐ichi Uchida, M. Furumiya, Mitsuji Okada, Masayuki Mizuno

2010 · 15 citations · 2 references

Concepts

Abstract

An on-chip transformer-based digital isolator for intelligent power management (IPM) systems is proposed. It greatly reduces the number of chips in IPM systems by allowing integration of isolators in a CMOS chip together with MPUs or gate drivers. With a proposed pulse generation / detection scheme that enables a 5V standard CMOS transistor to utilize GHz-band signals, transformer area is reduced to 1/4~1/8 that of conventional transformers. A test chip achieves a 2.5kV isolation voltage, a 35kV/us CMR, a 1.6mA static current and a 250Mbps data rate, all which are equal to or superior to those of photo couplers or conventional digital isolators. The high-speed low-power capability expands the application potential to include isolated serial links, medical devices, displays, sensors, etc.

References

2