Custom analog low power design: the problem of low voltage and mismatch

Abstract

The never ending story of technology trends towards smaller transistor dimensions have resulted to date in deep submicron transistors. The consequence is the down scaling of the power supply voltages, to date even lower than 2 V, with almost the same threshold voltages of the CMOS transistors. Those low voltages mean that some widespread techniques such as switched-capacitors cannot be implemented anymore. On the other hand custom integrated circuits require continually higher speeds, more accuracy and less power drain. In the first section, the impact of mismatch or accuracy in analog circuits and the impact on power drain is discussed. Secondly, in section two some fundamental limitations of analog integrated circuit design in the trade-off between speed, accuracy and power drain are analysed. In the third section the problem of very low voltage signal processing in switched-capacitor circuits is studied. Some solutions, such as the switched-opamp technique are presented, and the technique is demonstrated by the design of a very low power, low voltage sigma delta modulator. The design and the measurements of 12 bit sigma delta AD converters running at 1.5 V power supply voltage and consuming less than 100 /spl mu/W in standard CMOS technology are finally discussed.