An ultra low power, reconfigurable, multi-standard transceiver using fully digital PLL

Sudipto Chakraborty, Viral K. Parikh, Swaminathan Sankaran, Tomas Motos, Oddgeir Fikstvedt, Jan-Tore Marienborg, Danielle Griffith, Indu Prathapan, K. Nagaraj, Frank Zhang,

2013 · 20 citations · 3 references

Concepts

Abstract

This paper presents an ultra low power reconfigurable, multi-standard (IEEE802.15.4, BLE, 5Mbps proprietary) ISM2.4GHz band transceiver compliant to FCC, ETSI class 2 and ARIB regulations. It uses a DPLL with counter based area and power efficient re-circulating TDC, current reuse low area DCO, dynamic divider, class-AB PA, and fully integrated LDOs. The RX is reconfigurable between zero-IF/low-IF along with antenna diversity. The transceiver consumes 3.5mA (TX), 3.1mA (RX) from 3.0V battery with on-chip DCDC converter, and occupies 1.1mm2 in 65nm CMOS process. The RX front-end provides 42dB gain, 6dB NF, and -34dBm input P1dB.

References

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