Review and Analysis of the Radiation-Induced Degradation Observed for the Input Bias Current of Linear Integrated Circuits

Abstract

It is shown that the variety of shapes of the input current versus dose curve observed in several ICs is due to circuit effects, depending on the architecture, the value of the currents and the bias conditions. When stages are cascaded, the degradation of the second stage may add or subtract current to the collector current of the input transistor. The variations of the collector currents can be evaluated using the variations of the supply current. It is then possible to model the compensation effects using basic equations and study the impact of irradiation conditions. In some cases, the effect of biasing the circuit during irradiation is to reduce the compensation mechanism leading to an stronger increase in the input current. When a peak shaped degradation curve is recorded, annealing may either induce an additional degradation or a recovery depending on which side of the peak irradiation has brought the circuit.