IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2004 · 46 citations · 31 references
EngineeringComputer EngineeringComputer ScienceLow-power DesignReal-time SystemsSchedulingDynamic Power ReductionPower ManagementPower OptimizationPower-aware DesignReal-time SchedulingVoltage ScalingDiscretizationDynamic ScalingEnergy ConsumptionGreedy HeuristicsPower Management TechniquesPower-aware SchedulingProcessor ArchitectureVoltage Scaling In Microprocessors
Voltage scheduling is an essential technique used to exploit the benefit of dynamic voltage-scaling processors. Though extensive research exists in this area, current processor limitations such as time and energy transition overhead and voltage-level discretization are often dismissed as insignificant. We show that for hard real-time applications, disregarding these details can lead to suboptimal or even invalid results. We propose two algorithms to account for these limitations. The first is a greedy approach, while the second is more complex, but can significantly reduce the system's energy consumption. Through experimental results on both real and randomly generated systems, we show the effectiveness of both algorithms and explore what conditions make it beneficial to use the complex algorithm over the basic one.
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A scheduling model for reduced CPU energy
Fei Yao, Alan Demers, Scott Shenker · 2002 · 1.5K citations
Design issues for dynamic voltage scaling
Thomas D. Burd, R.W. Brodersen · 2000 · 362 citations · Full text