Logic Failure Analysis of CMOS VLSI using a Laser Probe

Abstract

An improved technique for using a focused laser beam to extract logical levels of internal IC transistors in a non-contact and non-destructive manner is introduced and described. Advances in the detection scheme coupled with computer control and signal processing allow automated operation. Various tests were performed on CMOS microprocessors to exemplify the frequency, noise, and drift insensitivity of the detection scheme. These results will be presented, along with a discussion on the practical use of the technique and its extension for testing NMOS and bipolar technologies.