High performance poly-Si TFTs fabricated using pulsed laser annealing and remote plasma CVD with low temperature processing

Abstract

Key technologies for fabricating polycrystalline silicon thin film transistors (poly-Si TFTs) at a low temperature are discussed. Hydrogenated amorphous silicon films were crystallized by irradiation of a 30 ns-pulsed XeCl excimer laser. Crystalline grains were smaller than 100 nm. The density of localized trap states in poly-Si films was reduced to 4/spl times/10/sup 16/ cm/sup -3/ by plasma hydrogenation only for 30 seconds. Remote plasma chemical vapor deposition (CVD) using mesh electrodes realized a good interface of SiO/sub 2//Si with the interface trap density of 2.0/spl times/10/sup 10/ cm/sup -2/ eV/sup -1/ at 270/spl deg/C. Poly-Si TFTs were fabricated at 270/spl deg/C using laser crystallization, plasma hydrogenation and remote plasma CVD. The carrier mobility was 640 cm/sup 2//Vs for n-channel TFTs and 400 cm/sup 2//Vs for p-channel TFTs. The threshold voltage was 0.8 V for n-channel TFTs and -1.5 V for p-channel TFTs. The leakage current of n-channel poly-Si TFTs was reduced from 2/spl times/10/sup -10/ A//spl mu/m to 3/spl times/10/sup -13/ A//spl mu/m at the gate voltage of -5 V using an offset gate electrode with an offset length of 1 /spl mu/m.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>