Vertical Silicon p-n-p-n Tunnel nMOSFET With MBE-Grown Tunneling Junction

Abstract

Tunnel field-effect transistors (TFETs) can potentially achieve sub-60-mV/dec SS, but their performance strongly depends on the dopant profile at the tunneling junction. In this paper, very sharp (~.2 nm/dec) optimized tunneling-junction dopant profile for the silicon p-n-p-n TFET is demonstrated by molecular beam epitaxial growth. Devices are fabricated with a low-thermal-budget ( <; 620°C) vertical process flow to preserve the as-grown channel profile. Compared with a p-i-n TFET, the p-n-p-n TFET has 30% lower subthreshold swing, I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> three times higher, and 50% reduced tunneling voltage drop.