Explicit analysis of channel mismatch effects in time-interleaved ADC systems

TLDR

Time‑interleaved ADCs achieve high sampling rates by operating multiple slower ADCs in staggered fashion, but offset, gain, and timing mismatches among the channels degrade the overall signal‑to‑noise ratio. This study investigates the combined effects of channel mismatches—including offset, gain, timing, and bandwidth—in time‑interleaved ADCs. The authors derive explicit formulas that capture the joint impact of offset, gain, and timing mismatches and provide these expressions for use in calibration algorithms. The analysis shows that gain and timing mismatches interact, whereas offset mismatch remains independent, a relationship that is evident in the frequency domain.

Abstract

A time-interleaved A-D converter (ADC) system is an effective way to implement a high-sampling-rate ADC with relatively slow circuits. In the system, several channel ADCs operate at interleaved sampling times as if they were effectively a single ADC operating at a much higher sampling rate. However, mismatches such as offset, gain mismatches among channel ADCs as well as timing skew of the clocks distributed to them degrade S/N of the ADC system as a whole. This paper analyzes the channel mismatch effects in the time-interleaved ADC system. Previous analysis showed the effect for each mismatch individually, however in this paper we derive explicit formulas for the mismatch effects when all of offset, gain and timing mismatches exist together. We have clarified that the gain and timing mismatch effects interact with each other but the offset mismatch effect is independent from them, and this can be seen clearly in frequency domain. We also discuss the bandwidth mismatch effect. The derived formulas can be used for calibration algorithms to compensate for the channel mismatch effects.