An emulated digital architecture implementing the CNN Universal Machine

Abstract

An emulated digital VLSI CMOS architecture is described, where the main features are as follows: (i) variable accuracy, (ii) a complete CNN Universal Machine on the silicon, (iii) a good area time trade off. The whole architecture was defined on VHDL and the following key parameters of the implementation were computed namely, (i) the speed (1 ns/virtual cell/iteration), (ii) the number of the physical processing cells per cm/sup 2/ is 24 by using 0.35 /spl mu/m three metal layer CMOS technology.