IEE Proceedings - Circuits Devices and Systems · 2001 · 15 citations · 9 references
EngineeringComputer EngineeringElectrical EngineeringMicroelectronicsNeural EngineeringSemiconductor DevicesAnalog Integrated CircuitsCmos Circuit DesignIntegrated Circuit DesignIntegrated Circuit DevicesNeural CircuitsNeural Signal ProcessingCalibration TechniquesCmos Digital Circuit DesignCmos Logic CircuitsConvertersNeural Circuit ArchitectureNeural Circuit FunctionPower ConsumptionPower Consumption Optimization
The neuron MOS transistor is a recently discovered device which is capable of executing a weighted sum calculation of multiple input signals and threshold operation based on the result of summation, thereby simulating the function of biological neurons. A comprehensive set of neuron test transistors has been designed, where a number of input gates are coupled capacitively to a floating gate, which controls the channel current. Integrated circuits for neural network applications have also been designed, based on the neuron MOS transistors. These circuits include neuron CMOS inverters and A/D and D/A converters. To increase the accuracy of the neuron MOSFET structures, calibration techniques are proposed and tested. All the test structures and circuits are implemented by using a standard 0.8 µm double-polysilicon CMOS technology. Attention was paid to saving of the layout area and reducing power consumption.
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