The Layout Synthesizer: An Automatic Block Generation System

Abstract

This paper describes a recently introduced commercial product called the Layout Synthesizer (LAS), which generates CMOS transistor-level layout from netlists without requiring library leaf-cells. LAS can generate blocks with different aspect ratios and pin locations. Comparisons with industry examples show consistently better density than standard cell approach and comparable density with manual designs. Custom blocks of 2,000 transistors can be generated in less than 30 CPU minutes. nth row I ground