Publikationsdatenbank der Fraunhofer-Gesellschaft (Fraunhofer-Gesellschaft) · 2009 · 13 citations · 3 references
EngineeringElectrical EngineeringMicroelectronicsPackaging DesignSemiconductor DevicesCmos Circuit DesignDevice CharacterizationDevice ReliabilityRadio-frequency Integrated CircuitsSemiconductor ReliabilityStress TestingCmos ReliabilityDevice DegradationPackage ParasiticsPackaging Reliability TestingPackaging-induced ReliabilityReliability DegradationRf Cmos DesignStress
Capacitive Coupled Transmission Line Pulsing (CC-TLP) has successfully identified a known CDM weakness at the RF inputs of two different 90 nm CMOS RF products. The presented study compares electrical and physical failure signatures for packaged devices and even for devices stressed at wafer level. The peak stress currents resulting in a failure as well as the failure signatures correlate very well for CDM and CC-TLP. The results also support the application of a single stress per pin with the potential to save many hours of test time without loosing confidence.
3