Publication | Closed Access
On the architecture of erasure error recovery under strict delay constraints
15
Citations
13
References
2008
Year
Unknown Venue
EngineeringError Control TechniqueComputer ArchitectureErasure Error RecoveryFormal VerificationDelay-tolerant NetworkingReliability EngineeringClock RecoveryData RecoverySystems EngineeringFault RecoveryMulticastParallel ComputingErasure Error ModelComputer EngineeringComputer ScienceError Correction CodeReliable CommunicationFault-tolerant NetworkNetwork Communication ProtocolEdge ComputingFormal MethodsWireless NetworksStrict Delay Constraints
Media-based services often require a multicast-enabled transport that guarantees quasi error free transmission under strict delay constraints. In packet based networks, furthermore, both multicast and delay constraints deeply influence the architecture of erasure error recovery. Therefore, we propose a general architecture and study its optimization in this paper. Since the Gilbert-Elliot (GE) erasure error model has been proven to be valid for a wide range of packet based wireless networks, in this paper, we present the generalized architecture and its optimization based on the GE channel model. The architecture integrates nearly all existing erasure error recovery techniques: Automatic Repeat Request, Forward Error Correction and Hybrid ARQ techniques. Through the optimization, the total needed redundancy information can be minimized by choosing the best scheme automatically among the entire schemes included in the architecture.
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