Vertical MOS transistors with 70 nm channel length

Abstract

Vertical nMOS transistors with channel lengths down to 70 nm and thin gate oxides have been fabricated using LPCVD epitaxy for the definition of the channel region instead of fine line lithography. The devices show drain current and transconductance values comparable to very advanced planar transistors. For the shortest channel length a very strong increase of saturation current is observed and is attributed to V/sub t/ shift and floating substrate effects. Moreover, transconductance may indicate ballistic overshoot. Besides high saturation currents due to very short channel lengths higher integration density seems to be very attractive for special applications.