IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing · 2004 · 207 citations · 6 references
EngineeringComputer EngineeringElectrical EngineeringLow-power DesignMicroelectronicsVlsi DesignCmos Circuit DesignComplementary Metal-oxide-semiconductor TechnologyIntegrated Circuit DesignLow-power Digital Circuit DesignPower ManagementPower OptimizationAdder DesignAddersEnergy-efficient Digital CircuitsLow-power AddersLow-power Circuit DesignLow-power Cmos DesignMultiplier DesignPower Consumption
The 1-bit full adder circuit is a very important component in the design of application specific integrated circuits. This paper presents a novel low-power multiplexer-based 1-bit full adder that uses 12 transistors (MBA-12T). In addition to reduced transition activity and charge recycling capability, this circuit has no direct connections to the power-supply nodes, leading to a noticeable reduction in short-current power consumption. Intensive HSPICE simulation shows that the new adder has more than 26% in power savings over conventional 28-transistor CMOS adder and it consumes 23% less power than 10-transistor adders (SERF and 10T ) and is 64% faster.
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Anantha P. Chandrakasan, R.W. Brodersen · 2015 · 2.2K citations
Engineering, Computer Engineering, Electrical Engineering +17
A novel low power energy recovery full adder cell
R. Shalem, Eugene John, Lizy K. John · 2003 · 193 citations
Engineering, Computer Engineering, Electrical Engineering +17