Origins of threshold voltage shifts in room-temperature deposited and annealed a-In–Ga–Zn–O thin-film transistors

Kenji Nomura, Toshio Kamiya, Masahiro Hirano, Hideo Hosono

Applied Physics Letters · 2009 · 357 citations · 10 references

Concepts

Abstract

Threshold voltage (Vth) stability was examined under constant current stress for a-In–Ga–Zn–O thin film transistors (TFTs) deposited at room temperature and annealed at 400 °C in dry or wet O2 atmospheres. All the TFTs exhibited positive Vth shifts (ΔVth) and the ΔVth value was reduced by the thermal annealing to <2 V for 50 h. TFT simulations revealed that the ΔVth for the annealed TFTs is explained by increase in deep charged defects. Large ΔVth over 10 V and deterioration in subthreshold voltage swing were observed in the unannealed TFTs, which are attributed to the increase in shallow trap states.

References

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