RF MEMS Passives on High-Resistivity Silicon Substrates

Abstract

Diverse RF passive devices and microelectro- mechanical systems (MEMS) can be monolithically integrated on a high-resistivity silicon (HR-Si) substrate. However, parasitic surface conduction (PSC) at the interface of HR-Si and a silicon dioxide (SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ) passivation layer reduces the effective substrate resistivity, which in turn results in deterioration of the device quality factor (Q) and non-linearity. Trap-rich HR-Si has been proposed as a low substrate loss alternative, eliminating the problems associated with PSC. However, the full potential of trap-rich HR-Si as a common platform for implementing MEMS passives is not fully explored. In this letter, we evaluate the effectiveness of the trap-rich layer by comparing the frequency response of a number of RF passive devices fabricated on standard and trap-rich HR-Si substrates. In addition, we suggest an electromagnetic (EM) simulation setup that can be used to efficiently and accurately simulate the device performance.