2013 · 35 citations · 10 references
ComputingComputer EngineeringComputer ScienceAlgorithmsDesign AutomationFormal MethodsBoolean AlgebraCombinational Logic DescriptionDeductive VerificationDigital Logic DesignEquivalence CheckingLogic SynthesisCircuit Equivalence CheckingCombinational Circuit VerificationCombinational Equivalence CheckingCombinational Logic SynthesisFormal Specification Of Combinational CircuitsFormal Verification For SynthesisPartial DesignsQuantifier Elimination
We consider the partial equivalence checking problem (PEC), i. e., checking whether a given partial implementation of a combinational circuit can (still) be extended to a complete design that is equivalent to a given full specification. To solve PEC, we give a linear transformation from PEC to the question whether a dependency quantified Boolean formula (DQBF) is satisfied. Our novel algorithm to solve DQBF based on quantifier elimination can therefore be applied to solve PEC.We also present first experimental results showing the feasibility of our approach and the inaccuracy of QBF approximations, which are usually used for deciding the PEC so far.
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