Ferroelectric memory FET with Ir/IrO₂ electrodes

Abstract

Abstract We proposed a MFMIS structure having a floating gate as a bottom electrode between a ferroelectric thin film and the gate SiO2. Conventional gate SiO2 can be used and ferroelectric thin films can be grown on bottom electrodes which have a good matching with the ferroelectric materials due to adopt the MFMIS structure. Ir and IrO2 on poly-Si were used as floating gate. When a IrO2 layer was formed between PZT and poly-Si, a high-quality PZT thin film was obtained and the PZT films show no fatigue up to 1012 cycles of switching pulses. From the ID-VG characteristics measurement for 1·2 μm P-ch MFMIS FET, the shift in Vth or the memory window for a bias sweep of ±15V was about 3·3V. The difference of ID-VD curves which corresponded to ID-VG characteristics were found between before and after a programming pulse was applied.