Self-align implantation for <i>n</i> ⁺ -layer technology (SAINT) for high-speed GaAs ICs

Abstract

A new GaAs MESFET structure with n+-implanted layers and a self-aligned gate has been developed by dielectric lift-off technology with trilevel resist. The electrical characteristics are improved greatly by resistance reduction outside the channel under the gate. 280 mS/mm transconductance and 39.5 ps/gate propagation delay have been obtained.