Concepedia

Abstract

Insulated gate electronic devices on InP and related III–V compound semiconductors have not to date achieved a level of performance adequate for commercial exploitation. This in part is believed to be due to the noncongruent dissociation of the group V element upon heating. In order to minimize such surface effects on InP, we have investigated two broad approaches; one involving the creation of an excess overpressure of phosphorous to suppress the anion loss; and one involving the creation of an ideal interface analogous to the SiO2/Si system by sulfurization. In situ photoluminescence, measured during annealing in a phosphorous ambient in a mass spectrometer equipped low-pressure chemical vapor deposition growth chamber, shows that surface degradation may be retarded by appropriate use of gaseous phosphorous. A phosphorous-rich interfacial oxide, grown prior to SiO2 growth, similarly appears to considerably improve the interface of InP metal–insulator–semiconductor (MIS) structures as seen by C–V analysis. Sulfurized InP MIS structures treated in (NH4)2Sx, show excellent interface quality as judged by high-frequency and quasistatic C–V measurements. MIS field effect transistors fabricated using the benefits of these surface treatments show large transconductances and stabilities approaching those of thermal SiO2/Si with <5% variation in drain current over a 12 h test period.