Instability dependent upon bias and temperature stress in amorphous‐indium gallium zinc oxide (a‐IGZO) thin‐film transistors

Abstract

Abstract— The effects of gate‐bias stress, drain‐bias stress, and temperature on the electrical parameters of amorphous‐indium gallium zinc oxide (a‐IGZO) thin‐film transistors have been investigated. Results demonstrate that the devices suffer from threshold‐voltage instabilities that are recovered at room temperature without any treatments. It is suggested that these instabilities result from the bias field and temperature‐assisted charging and discharging phenomenon of preexisting traps at the near‐interface and the a‐IGZO channel region. The experimental results show that applying a drain‐bias stress obviously impacts the instability of a‐IGZO TFTs; however, the instability caused by drain bias is not caused by hot‐electron generation as in conventional MOSFETs. And the degradation trend is affected by thermally activated carriers at high temperature.