Capacitance-Voltage Study of Silicon-on-Insulator Structure with an Ultrathin Buried SiO₂ Layer Fabricated by Wafer Bonding

Abstract

A silicon-on-insulator (SOI) structure with a thin (typically 20 nm) Si layer and an ultrathin (2 nm) thermally grown buried SiO 2 layer, which is a key structure in novel Si devices, was fabricated in our laboratory by a wafer bonding technique. Transmission electron microscope observation revealed that the ultrathin buried oxide layer is continuous and uniform in thickness. For the SOI samples, the effect of direct carrier tunneling through the buried oxide was studied by capacitance-voltage ( C-V ) measurements. The resultant C-V characteristics were found to be determined by the tunneling probability of carriers through the buried oxide, and band bending in the SOI layer.