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Electron transport in strained Si inversion layers grown on SiGe-on-insulator substrates
181
Citations
18
References
2002
Year
Electrical EngineeringEngineeringPhysicsMonte Carlo SimulatorNanoelectronicsApplied PhysicsElectron TransportSemiconductor Device FabricationElectron MobilitySige-on-insulator SubstratesCharge Carrier TransportMicroelectronicsGermanium Mole FractionSilicon On InsulatorSemiconductor Device
We show by simulation that electron mobility and velocity overshoot are greater when strained inversion layers are grown on SiGe-On-insulator substrates (strained Si/SiGe-OI) than when unstrained silicon-on-insulator (SOI) devices are employed. In addition, mobility in these strained inversion layers is only slightly degraded compared with strained bulk Si/SiGe inversion layers, due to the phonon scattering increase produced by greater carrier confinement. Poisson and Schroedinger equations are self-consistently solved to evaluate the carrier distribution in this structure. A Monte Carlo simulator is used to solve the Boltzmann transport equation. Electron mobility in these devices is compared to that in SOI inversion layers and in bulk Si/SiGe inversion layers. The effect of the germanium mole fraction x, the strained-silicon layer thickness, TSi, and the total width of semiconductor (Si+SiGe) slab sandwiched between the two oxide layers, Tw were carefully analyzed. We observed strong dependence of the electron mobility on TSi, due to the increase in the phonon scattering rate as the silicon layer thickness is reduced, a consequence of the greater confinement of the carriers. This effect is less important as the germanium mole fraction, x, is reduced, and as the value of TSi increases. For TSi>20 nm, mobility does not depend on TSi, and maximum mobility values are obtained.
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