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A 128Gb 3b/cell NAND flash design using 20nm planar-cell technology
29
Citations
2
References
2013
Year
Unknown Venue
Sensing SchemeNon-volatile MemoryElectrical EngineeringRamping TechniqueEngineeringMicrofabricationNanoelectronicsFlash MemoryApplied PhysicsNand Flash DesignComputer EngineeringComputer ArchitectureSemiconductor MemoryMicroelectronicsPlanar Cell
The authors develop a 128Gb 3b/cell NAND Flash memory based on 20nm fully planar cell process technology. The planar cell allows the memory cell to be scaled in both the wordline (WL) and bitline (BL) directions, resulting in a small 3b/cell memory device. The sensing scheme is based on a ramping technique that allows the detection of hard and soft states in a single operation.
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