Full-chip reliability analysis

Abstract

Reliability analysis has not been promoted to the full-chip realm because techniques to extract, manage, and process full-chip power grid and signal data have not been previously available. This paper introduces techniques that have been developed to permit both full-chip power grid and signal net electromigration and Joule heating analysis. Results of this analysis provide feedback to the designer to permit easy design modification to provide superior "designed-in" long term reliability.