Hierarchical fault modeling for linear analog circuits

Asymptotic waveform evaluation for timing analysis

L.T. Pillage, R.A. Rohrer · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1990 · 1.9K citations

Engineering, Electrical Engineering, Circuit Theory +16

Inductive Fault Analysis of MOS Integrated Circuits

John Paul Shen, W. Maly, Frances Ferguson · IEEE Design & Test of Computers · 1985 · 508 citations

Engineering, Computer Science, Electrical Engineering +16

VLASIC: A Catastrophic Fault Yield Simulator for Integrated Circuits

Hank Walker, Stephen W. Director · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1986 · 248 citations

Engineering, Computer Engineering, Electrical Engineering +17

RICE

C.L. Ratzlaff, Nanda Gopal, L.T. Pillage · 1991 · 170 citations

Agriculture, Agronomy, Crop Sciences +17

"RESISTIVE SHORTS" WITHIN CMOS GATES

Hong Hao, E.J. McCluskey · 2005 · 147 citations

Engineering, Computer Engineering, Electrical Engineering +14