Publication | Closed Access
Vector sets for exhaustive testing of logic circuits
193
Citations
13
References
1988
Year
Circuit ComplexityEngineeringVerificationComputational ComplexitySoftware AnalysisFormal VerificationComputational TestingAsynchronous CircuitsArbitrary Logic CircuitComputer EngineeringBuilt-in Self-testComputer ScienceDesign For TestingTheory Of Computing-Universal SetsLogic SynthesisAutomated ReasoningSoftware TestingFormal MethodsMathematical FoundationsProperty TestingTest SetsVector Sets
(L, d)-universal sets are useful for exhaustively testing logic circuits with a large number of functional components, designed so that every functional component depends on at most d inputs. Randomized and deterministic constructions of (L, d)-universal test sets are presented, and lower and upper bounds on the optimal sizes of such sets are proven. It is also proven that the design of an optimal exhaustive test set for an arbitrary logic circuit is an NP-complete problem.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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