Experimental Demonstration of Ultrashort-Channel (3 nm) Junctionless FETs Utilizing Atomically Sharp V-Grooves on SOI

Abstract

Ultrashort-channel junctionless FETs (JL-FETs) were fabricated on silicon-on-insulator substrates utilizing atomically sharp V-shaped grooves produced by anisotropic wet etching. The channel length, defined as the width of the V-groove bottom, was as short as 3 nm, and the channel thickness was between 1 and 8 nm. Excellent transistor characteristics with threshold voltages that are optimal for low-power operation were obtained for both n-FETs and p-FETs when the thickness of both the channel and gate dielectric film thickness was reduced to 1 nm. The origin of the excellent electrostatic control is discussed on the basis of fringe capacitance and quantum confinement effects in a nanometer-scale ultrathin Si layer where band-gap expansion, dielectric constant reduction, and increase in the dopant activation energy become prominent. The electrical characteristics of the ultrashort channel JL-FETs were found to be very sensitive to device parameters such as the channel thickness and dopant concentration.