Effects of oxide thickness and temperature on dispersions in InGaAs MOS C-V characteristics

Abstract

The apparent dependence of trap induced dispersion on oxide thickness in the InGaAs metal–oxide–semiconductor C-V data is explained by a thickness independent trap density. The model shows that for the same trap density, the normalized C-V dispersion due to border traps increases toward thinner oxides, whereas that due to interface states behaves oppositely, exactly as observed in the data. For the temperature effect, the dispersion in C-V from interface states diminishes at low temperatures, while that from oxide traps changes little to none. Those trends are shown to be driven by a temperature dependent trap time constant, not trap density.