Elimination of End‐of‐Range Shallow Junction Implantation Damage during CMOS Titanium Silicidation

Abstract

Interstitial dislocation loops present in shallow junctions formed following Ge preamorphization and rapid thermal annealing have been eliminated using titanium silicide. The dissolution of these end‐of‐range defects is attributed to the injection of vacancies during silicidation. The size and number of the residual extended defects were reduced in both p+ and n+ junctions after the formation of . The silicide sheet resistance is a measure of the amount of silicide reaction and concomitant vacancy injection. The total elimination of these defects was observed in shallow p+ junctions for sheet resistance of below 3 Ω/□. Leakage current reduction in silicided p+/n junctions, was correlated with the defect reduction.