A 1.2mW 0.02mm2 2GHz Current-Controlled PLL Based on a Self-Biased Voltage-to-Current Converter

Wooyoung Jung, Hyoung-Chul Choi, C.W. Jeong, KwiYoung Kim, Wooseok Kim, HaJun Jeon, GyeSoo Koo, Jihyun Kim, Jin‐Ho Seo, Myeong-Lyong Ko,

2007 · 24 citations · 6 references

Concepts

Abstract

A 0.5-to-2GHz frequency synthesizer PLL implemented in a 90nm CMOS technology uses a 1.0V supply and dissipates 0.6 and 1.2mW while operating at 1 and 2GHz, respectively. The PLL occupies an active die area of 0.02mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The current-controlled method based on a self-biased voltage-to-current converter enables the use of a small size loop filter and makes the PLL bandwidth insensitive to PVT variations and multiplication factor.

References

6