2007 · 24 citations · 6 references
EngineeringElectrical EngineeringAnalog ElectronicsMicroelectronicsVlsi DesignCmos Circuit DesignHigh-frequency Power ConversionBandwidthCmos OscillatorsFrequency SynthesizersHigh-frequency OperationMultiplication FactorVoltage-to-current Conversion
A 0.5-to-2GHz frequency synthesizer PLL implemented in a 90nm CMOS technology uses a 1.0V supply and dissipates 0.6 and 1.2mW while operating at 1 and 2GHz, respectively. The PLL occupies an active die area of 0.02mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The current-controlled method based on a self-biased voltage-to-current converter enables the use of a small size loop filter and makes the PLL bandwidth insensitive to PVT variations and multiplication factor.
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A 0.4-4 Gb/s CMOS quad transceiver cell using on-chip regulated dual-loop PLLs
K.-Y.K. Chang, J. Wei, S. Li et al. · 2003 · 21 citations