2010 · 14 citations · 14 references
ComputingComputer ScienceHigh-performance ComputingComputer ArchitectureComputer GraphicsParallel ComputingData ParallelismGraphics Processing Unit ArchitectureGraphics Processing Unit ComputingMemory HierarchyMemory Hierarchy OptimizationParallel Computing SystemsGpu ArchitectureIndexingMemory Access LatencyMemory LatencyMemory Latency OptimizationMemory Latency ReductionMemory Locality OptimizationScientific Computing On Gpus
High performance computing environments are not freely available to every scientist or programmer. However, massively parallel computational devices are available in nearly every workstation class computer and laptop sold today. The programmable GPU gives immense computational power to a user in a standard office environment; however, programming a GPU to function efficiently is not a trivial task. An issue of primary concern is memory latency, if not managed properly it can cost the GPU in performance resulting in increased runtimes waiting for data. In this paper we describe an optimization of memory access methods on GPUs using Morton order indexing, sometimes referred to as Z-order index.
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A Survey of General‐Purpose Computation on Graphics Hardware
John D. Owens, David Luebke, Naga K. Govindaraju et al. · Computer Graphics Forum · 2007 · 2K citations
Scalable parallel programming with CUDA
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Scalable Parallel Programming with CUDA
John Nickolls, Ian Buck, Michael Garland et al. · Queue · 2008 · 1.6K citations · Full text