Publication | Closed Access
Transport of carriers in metal/porous silicon/<i>c</i>-Si device structures based on oxidized porous silicon
27
Citations
15
References
2001
Year
Materials ScienceSemiconductor TechnologyElectrical EngineeringSemiconductor DeviceHigh ConductivityEngineeringSurface ScienceApplied PhysicsSemiconductor MaterialsSemiconductor Device FabricationIntegrated CircuitsOxidized Porous SiliconLocalized StatesSilicon On InsulatorCharge Carrier TransportInterconnect (Integrated Circuits)Ps Layer
Current–voltage (I–V) and impedance measurements of oxidized metal/porous silicon (PS)/c-Si sandwich structures were performed at various temperatures. The I–V dependence at relatively small bias was found to be determined by the resistance of the PS layer. When the reverse bias is increased the injection of carriers commences. A power-law space charge limited current in the I–V dependence was observed at high forward bias. An exponential energy distribution of localized states with a characteristic energy of 60 meV was calculated from these. The existence of an inversion (n-type) layer with high conductivity was established in the p-type c-Si substrate adjacent to the PS layer. The presence of this inversion layer leads to an increase of the active device area, capacitance, and reverse current.
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