Publication | Closed Access
Razor: circuit-level correction of timing errors for low-power operation
404
Citations
10
References
2004
Year
Hardware SecurityVoltage MarginsPower-aware ComputingEngineeringVlsi DesignSmart GridClock RecoveryTiming AnalysisPower Optimization (Eda)Computer EngineeringComputer ArchitectureDynamic DetectionComputer ScienceTiming ErrorsDynamic Voltage ScalingPower-aware DesignPower-aware SoftwarePower Management
Dynamic voltage scaling is one of the more effective and widely used methods for power-aware computing. We present a DVS approach that uses dynamic detection and correction of circuit timing errors to tune processor supply voltage and eliminate the need for voltage margins.
| Year | Citations | |
|---|---|---|
Page 1
Page 1