Suppression of Anomalous Gate Edge Leakage Current by Control of Ni Silicidation Region using Si Ion Implantation Technique

Abstract

It is reported for the first time that the anomalous gate edge leakage current in NMOSFETs is caused by the lateral growth of Ni silicide toward the channel region, and this lateral growth is successfully suppressed by the control of the Ni silicidation region using the Si ion implantation (Si I.I.) technique. As a result, the anomalous gate edge leakage current is successfully reduced, and the standby current and yield for 65nm-node SRAM are greatly improved. This novel technique has high potential for 45nm and 32nm CMOS technology