Device physics and design of double-gate tunneling field-effect transistor by silicon film thickness optimization

Abstract

The device physics of the double-gate tunneling field-effect transistor (DG TFET) is explored through two dimensional device simulations. The on-state drain current Ion of the DG TFET, which is based on band-to-band tunneling, has a strong dependence on the silicon film thickness TSi and the physics governing it is detailed. It is established that band-to-band tunneling at the surface is very strong and accounts for a large part of the total drain current. However, a substantial part of the total drain current Ids is contributed by a subsurface portion of the silicon film. Detailed potential distributions show that the coupling of two gate electrodes in the DG TFET could effectively reduce the tunneling width ωT at the center of the silicon film up to an optimum TSi where maximum drain current is obtained.