2008 · 227 citations · 14 references
ComputingComputer ScienceComputer SystemsComputer ArchitectureParallel ComputingSystem-on-chip DesignBenchmarkingInstruction Set ArchitectureMulticore Processor DesignParallel ArchitecturesPerformance Bottleneck AnalysisPerformance ModelingChip MultiprocessingMicroarchitectural Performance ModelingMicroarchitecture PerformanceMicroarchitecture Performance EvaluationPerformance BenchmarkingPerformance PredictionWorkload Characterization
The PARSEC benchmark suite was recently released and has been adopted by a significant number of users within a short amount of time. This new collection of workloads is not yet fully understood by researchers. In this study we compare the SPLASH-2 and PARSEC benchmark suites with each other to gain insights into differences and similarities between the two program collections. We use standard statistical methods and machine learning to analyze the suites for redundancy and overlap on Chip-Multiprocessors (CMPs). Our analysis shows that PARSEC workloads are fundamentally different from SPLASH-2 benchmarks. The observed differences can be explained with two technology trends, the proliferation of CMPs and the accelerating growth of world data.
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Steven Cameron Woo, Moriyoshi Ohara, Evan Torrie et al. · 1995 · 3.6K citations · Full text
Christian Bienia, Sanjeev Kumar, Jaswinder Pal Singh et al. · 2008 · 3.4K citations
The SPLASH-2 programs: characterization and methodological considerations
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