Publication | Open Access
Reduction of dislocation density in mismatched SiGe/Si using a low-temperature Si buffer layer
119
Citations
17
References
1997
Year
EngineeringIntegrated CircuitsSilicon On InsulatorNanoelectronicsMismatched Sige/siDislocation DensityMaterials EngineeringSemiconductor TechnologyElectrical EngineeringPhysicsCrystalline DefectsμM Lt-si BufferDefect FormationSemiconductor Device FabricationRelaxed Sige/siMicroelectronicsSilicon DebuggingDislocation InteractionApplied PhysicsMultilayer Heterostructures
The reduction of the dislocation density in relaxed SiGe/Si heterostructures using a low-temperature Si(LT-Si) buffer has been investigated. We have shown that a 0.1 μm LT-Si buffer reduces the threading dislocation density in mismatched Si0.85Ge0.15/Si epitaxial layers as low as ∼104 cm−2. Samples were grown by both gas-source molecular beam epitaxy and ultrahigh vacuum chemical vapor deposition.
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