Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 2003 · 18 citations · 0 references
EngineeringElectrical EngineeringMaterials ScienceMicroelectronicsSemiconductor DevicesSemiconductor MaterialsCmos Circuit DesignDetector TechnologyInfrared DetectorsOptoelectronic DevicesSemiconductor DetectorsSemiconductor Device MaterialsComplementary Metal-oxide-semiconductor DetectorsDevice FabricationInternal ResistanceLift-offPolysiliconSacrificial Layer DepositionThermal Infrared DetectorsThermocouples
This paper presents the first-ever 120×90 element thermoelectric IR focal plane array (FPA) fabricated wiht CMOS technology. The device has a high repsonsivity of 3,900 V/W and a low cost potential. The overall chip size is 14.4 mm × 11.0 mm with a 12.0 mm × 9.0 mm imaging area. The device structure was optimzed for a vacuum-sealed package. Each detector consists of two pairs of p-n polysilicon thermocouples and an NMOS transistor and has external dimensions of 100μm x 100μm and an internal electrical resistance of 90kΩ. The precisely patterned Au-black IR absorbing layer was achieved by both a low-pressure vapor deposition technique and a lift-off technique utilizing a PSG sacrificial layer. These techniques make it possible to obtain a Au-black pattern with the same degree of accuracy as with the CMOS process. The Au-black layer showed high absorpitivty of more than 90 percent to the light source with a wavelength of from 8 to 13μm. This performance is suitable for consumer electronics as well as automotive applications.