Sample‐and‐hold circuit with dynamic switch leakage compensation

Abstract

For sample‐and‐hold (S/H) circuits operating at low sampling rate and high temperature, the switch leakage current is one of the major error sources. A S/H circuit with dynamic switch leakage compensation is presented. The proposed leakage current compensation circuit generates switch leakage replicas that track the actual leakages in the sampling switches. A bidirectional current steering circuit allows the switch leakage to be dynamically compensated with the leakage replicas. A prototype S/H circuit is fabricated in a 1 µm silicon‐on‐isolation CMOS technology. Measurement has shown the effectiveness of dynamic leakage current compensation up to 280°C with a maximum 75% leakage reduction.