Publication | Open Access
Methods for predicting the sensitivity of matched-field processors to mismatch
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1989
Year
EngineeringSensor ArrayComputer ArchitectureSignal ReplicasProcessor ArchitectureHardware SystemsLocalizationSignal IntegrityHardware SecurityArray ComputingHigh-performance ArchitectureSystems EngineeringSignal ReplicaParallel ComputingManycore ProcessorPerformance ImprovementError CorrectionPerformance PredictionSensor Signal ProcessingMatched-field ProcessorsComputer EngineeringComputer ScienceSignal ProcessingArray ProcessingSoftware TestingLocalization Performance
Most array processing schemes rely on the use of a signal replica correlated with the sensor observations to detect and localize targets of interest. Matched-field processors make use of signal replicas that are accurately tuned to available environmental knowledge. When knowledge about the array system, such as sensor positions, or environmental parameters, such as sound speed, is imprecise, this causes a ‘‘mismatch’’ between the replica and the observations. The performance of the processor may be seriously degraded by this mismatch. Analytic methods for predicting the sensitivity of the output power level to replica mismatch are developed, and bounds on the reduction in power level are developed. The use of these methods is illustrated through discussion of an example. Matched-field array processing methods can, in many situations, significantly improve target detection and localization performance. This article provides analytical tools which can be used to assess the performance of such processors in the context of real world system limitations.