High Holding Voltage SCR-LDMOS Stacking Structure With Ring-Resistance-Triggered Technique

Abstract

A novel ring-resistance-triggered stacked SCR-laterally diffused MOSs has been successfully verified in a 0.35 μm, 30-V/5-V bipolar CMOS DMOS process to solve the coupling of trigger voltage and holding voltage in stacking structures. The holding voltage of the proposed structure can be modulated by varying stacking numbers, and a high holding voltage of 22 V has been achieved using six stacks. On the other side, the trigger voltage almost keeps constant at ~ 53 V and a high failure current of 3.5 A has been achieved.