2013 · 22 citations · 7 references
EngineeringElectrical EngineeringAnalog ElectronicsMicroelectronicsMicrowave EngineeringCmos Circuit DesignLow-noise Circuit DesignMicrowave OscillatorsMillimeter-wave CommunicationsOscillatorsRadio-frequency Integrated CircuitsCmos OscillatorsLow-phase-noise OscillatorsNoise AnalysisOscillator Topology DesignPhase NoisePhase Noise AnalysisRf Cmos Design
We propose an ultra-low phase noise oscillator topology that works on the premise that coupling a second identical oscillator core would reduce the overall phase noise by 3 dB. For each core, a high-swing class-C oscillator is used to achieve the lowest phase noise. The realized oscillator is tunable from 4.07–4.91 GHz, drawing 39–59 mA from a 2.15 V power supply. The measured phase noise is −146.7 dBc/Hz and −163.1 dBc/Hz at 3 MHz and 20 MHz offset, respectively, from 4.07 GHz carrier. This is the lowest ever reported phase noise in bulk CMOS IC. This phase noise meets GSM900 normal basestation receiver and mobile station transmitter standards, which have the toughest phase noise requirements in cellular communications.
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