UTBB FDSOI transistors with dual STI for a multi-V<inf>t</inf> strategy at 20nm node and below

Abstract

We introduce an innovative dual-depth shallow trench isolation (dual STI) scheme for Ultra Thin Body and BOX (UTBB) FDSOI architecture. Since in the dual STI configuration wells are isolated from one another by the deepest trenches, this architecture enables a full use of the back bias while staying compatible with both standard bulk design and conventional SOI substrates. We demonstrate in 20nm ground rules that we are able to tune V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</sub> by more than 400mV, that transistor performance can be boosted by up to 30% and that I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</sub> can be controlled over 3 decades by allowing more than V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DD</sub> /2 to be applied on the back gate.