A 1V second order delta sigma ADC in 130nm CMOS

Abstract

Sigma-Delta modulators are commonly used in applications that require high resolution. In this paper a IV second order sigma delta ADC is presented. In this paper over sampling concept is used to address the problem of power dissipation and noise in ADCs. A second order sigma delta modulator is implemented using CMOS 130nm technology. Oversampling ratio is 128 and total power dissipation is found to be 68μW and area occupied is found to be 24μm ×30μm.